In a storage media device system, data is typically read from NAND flash devices, and then the read data is processed by a decoder. For example, the decoder may be an error-correcting code (ECC) decoder enabling reconstruction of the original error-free data. Data retention is the ability of a memory bit to retain its data state over long periods of time. The data retention of NAND flash devices may be limited by charge leaking from the floating gates of the memory cell transistors. Furthermore, leakage is accelerated by high temperature or radiation. Program-erase cycles (P/E cycles) can also degrade a NAND flash device. Therefore, improved techniques that support a flexible error correction scheme for correcting the errors in data read from NAND flash devices would be desirable.